Huawei says it has developed a new approach to chip design that may help it narrow the gap with Taiwan Semiconductor Manufacturing Co. (TSMC).
The Chinese technology company presented what it calls the Tau Scaling Law at the 2026 IEEE International Symposium on Circuits and Systems in Shanghai. He Tingbo, president of Huawei’s Semiconductor Business Department, delivered a keynote speech titled “New Semiconductor Path in Practice.”
Huawei says the Tau Scaling Law is intended to move the industry away from relying only on geometric scaling, where progress comes mainly from making transistors smaller.
Instead, the company says future gains can also come from reducing the time it takes signals and data to move through chips and computing systems.
Put simply, Huawei’s argument is that chips do not only become better when their transistors get smaller. They can also improve when signals move through them faster.
The company says this can be done by reducing delays inside chips. That includes cutting electrical resistance, reducing unwanted capacitance, and shortening the wiring paths that signals travel through.
Huawei says its new LogicFolding architecture is designed to help with this by making some circuit paths shorter and more efficient.
The company says the approach works across several levels. At the device level, it focuses on transistors and interconnects. At the circuit level, it uses LogicFolding. At the chip level, Huawei says it coordinates software, architecture, and silicon more closely. At the system level, it says a technology called UnifiedBus can reduce communication delays in large computing systems.
Huawei says it has designed and mass-produced 381 chips based on the Tau Scaling Law over the past six years. It also says Kirin chips scheduled for launch in fall 2026 will be the first to use the LogicFolding architecture.
By 2031, Huawei says high-end chips designed under the Tau Scaling Law are expected to reach transistor density equivalent to 1.4 nanometers.
The wording is important. Huawei is claiming a transistor-density equivalent, not proving that it can manufacture conventional 1.4 nanometer chips at scale.
Huawei is operating under tight constraints. US export controls have limited China’s access to the most advanced chipmaking equipment, including extreme ultraviolet lithography machines used by leading manufacturers to produce advanced semiconductors.
Huawei’s response seems to be a design-led route that tries to extract more performance from architecture, data movement, and system-level efficiency.
He Tingbo said Huawei wants the Tau Scaling Law to become part of a wider industry effort.
“We believe that openness and collaboration are key to driving ongoing progress in the semiconductor industry,” she said. “No single company can independently find all the answers along the path of semiconductor evolution. With the τ Scaling Law, we look forward to working closely with scientists, engineers, and industry partners around the world to drive the sustainable development of the semiconductor and electronics industries.”
But the claim remains unproven. Huawei has not shown that it can produce 1.4nm-equivalent chips at scale, and it has not shown that LogicFolding can match TSMC’s most advanced processes on power efficiency, yield, or manufacturing reliability.
Regardless, the announcement shows where Huawei wants to take its chip strategy. Rather than competing only on transistor shrinkage, it is trying to build a broader framework around signal speed, circuit layout, software-hardware coordination, and system communication.
That could help China improve chip performance despite equipment restrictions. It does not yet mean Huawei has caught TSMC.
